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19-1855 Rev 0; 11/00
+3.3V, 2.5Gbps Quad Transimpedance Amplifier for System Interconnects
General Description
The MAX3825 is a quad transimpedance amplifier (TIA) intended for 2.5Gbps system interconnect applications. Each of the four channels converts a small photodiode current to a measurable differential voltage with a transimpedance gain of 3.7k. The circuit features 460nARMS of input-referred noise per channel corresponding to an optical input sensitivity of -22.3dBm (BER 1 x 10-14). The quad transimpedance amplifier has 20ps of deterministic jitter and a 2.4GHz small-signal bandwidth. The MAX3825 is optimized for use with a quad PIN photodetector array with a standard fiber pitch of 250m. The MAX3825 operates from a single +3.3V supply over a 0C to +85C temperature range. With a +3.3V supply, each channel dissipates 93mW of power. A DC cancellation circuit on each channel provides a true differential output swing over a wide range of input currents. Each channel has an independent supply and ground to allow all or any combination of channels to be connected. This device is available in dice only.
Typical Operating Circuit appears at end of data sheet.
Features
o o o o o o o o o Single +3.3V Supply 93mW per Channel Power Dissipation 460nARMS Input-Referred Noise 20ps Deterministic Jitter 2.4GHz Small-Signal Bandwidth No External Compensation 40dB Power-Supply Rejection Ratio Compact Die with 250m Channel Pitch 100 Differential Output Impedance
MAX3825
Ordering Information
PART MAX3825U/D TEMP. RANGE 0C to +85C PIN-PACKAGE Dice*
*Dice are designed to operate with a 0C to +120C junction temperature, but are tested and guaranteed only at TA = +25C.
Applications
System Interconnects SDH/SONET Backplanes Dense Digital CrossConnects ATM Switching Networks High-Speed Parallel Optical Links
Chip Topography/Pad Configuration
VCCO1 OUT1+ OUT1- VCCO1 VCCO2 OUT2+ OUT2- VCCO2 VCCO3 OUT3+ OUT3- VCCO3 VCCO4 OUT4+ OUT4-VCCO4 N.C.
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GNDO1
37
20
GNDO4
GNDO2 GNDF
38 39
19 18 17 16 15 14
GNDO3 ENABLE
GNDI2 VCCI2 VCCI1 GNDI1 VCCFILT
40 41 42 43 44 1 N.C. 2 3 4 IN1 5 6 7 8 9 10 11 12 N.C. 13 N.C.
GNDI3 VCCI3 VCCI4 GNDI4
N.C. FILTER
FILT1 IN2 FILT2 IN3 FILT3 IN4 FILT4
________________________________________________________________ Maxim Integrated Products
1
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+3.3V, 2.5Gbps Quad Transimpedance Amplifier for System Interconnects MAX3825
ABSOLUTE MAXIMUM RATINGS
Supply Voltage VCCO1, VCCO2, VCCO3, VCCO4, VCCI1, VCCI2, VCCI3, VCCI4, VCCFILT ...............-0.5V to +6.0V Input Current: IN1, IN2, IN3, IN4...........................-4mA to +4mA FILTER Current..................................................-24mA to +24mA Filter Current: FILT1, FILT2, FILT3, FILT4 .............-6mA to +6mA Output Voltage OUT1, OUT2, OUT3, OUT4............................(VCC - 1.5V) to (VCC + 0.5V) ENABLE Voltage.........................................-0.5V to (VCC + 0.5V) Operating Temperature Range (TA)........................0C to +85C Storage Temperature Range .............................-55C to +150C Operating Junction Temperature (TJ)................-55C to +150C Processing Temperature..................................................+400C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +3.14V to +3.6V, TA = 0C to +85C. Typical values are at +3.3V, TA = +25C, unless otherwise noted.) MIN TYP PARAMETER SYMBOL CONDITIONS
Single channel Supply Current Input Bias Voltage DC Input Overload Transimpedance Filter Resistor RFILTER Filter Resistors RFILT1-4 Single-Ended Output Impedance Transimpedance Linear Range Maximum Differential Output Range Output Offset Voltage Output Common Mode Voltage Voffset Z21 RFILTER RFILT_ RO (Note 1) IIN = 2mAp-p IIN = 10Ap-p 50 loads to VCC 43 50 230 -5 VCC - 0.09 340 480 +5 10Ap-p, 100 differential load ICC Dual channel Quad channel IIN = 0 1.7 3.0 3.7 180 720 50 57 4.5 28 56 112 0.89 MAX 40 80 160 0.99 mA V mA k Ap-p mVp-p mV V UNITS
Note 1: Gain at 50Ap-p is within 10% of the small signal gain.
AC ELECTRICAL CHARACTERISTICS
(VCC = +3.14V to +3.6V, TA = 0C to +85C. Typical values are at +3.3V, TA = +25C, unless otherwise noted. Total source capacitance = 0.7pF.) (Note 2)
PARAMETER AC Input Overload Input Referred Noise Low-Frequency Cutoff Deterministic Jitter (Note 5) Power-Supply Rejection Ratio Small-Signal Bandwidth Maximum Skew (Note 7) DJ PSRR BW Any two channels within a chip IN (Note 4) IIN > 100Ap-p (Note 6) SYMBOL (Note 3) CONDITIONS MIN 2 460 60 20 40 2.4 50 600 100 45 TYP MAX UNITS mAp-p nArms kHz ps dB GHz ps
2
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+3.3V, 2.5Gbps Quad Transimpedance Amplifier for System Interconnects
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.14V to +3.6V, TA = 0C to +85C. Typical values are at +3.3V, TA = +25C, unless otherwise noted. Total source capacitance = 0.7pF.) (Note 2) AC characteristics are guaranteed by design and characterization. The maximum input current is specified with output deterministic jitter 45ps. No external compensation capacitors are used. Measured with IIN = 30Aavg. Deterministic jitter is the arithmetic sum of pattern-dependent jitter and pulse width distortion. Measured with a 213 -1 PRBS with 100 consecutive 0s and 100 consecutive 1s applied to a single channel. See Typical Operating Characteristics. Note 6: PSRR = -20log(VOUT / Vnoise(on VCC)), f 2MHz. Measured by applying DC current = 30A, and applying 100mVp-p signal at power supply. Note 7: Measured by applying the same input signal to all channels. Skew measurements are made at the 50% point of the transition. Note 2: Note 3: Note 4: Note 5:
MAX3825
Typical Operating Characteristics
(VCC = +3.3V, TA = +25C, unless otherwise noted.)
DETERMINISTIC JITTER vs. INPUT AMPLITUDE
MAX3825 toc01
FREQUENCY RESPONSE
75 50 45 PEAK-TO-PEAK JITTER (ps) 40 35 30 25 20 15 10 5 50 1 10 100 FREQUENCY (MHz) 1000 10,000 0 0
INPUT-REFERRED RMS NOISE CURRENT vs. DC INPUT CURRENT
MAX3825 toc02 MAX3825 toc03
1400 INPUT-REFERRED NOISE (nARMS) 1200 1000 800 CIN = 0.7pF 600 400 200 0
70 TRANSIMPEDANCE (dB)
65
60
55
400
800
1200
1600
2000
10
100 DC INPUT CURRENT (A)
1000
INPUT CURRENT AMPLITUDE (Ap-p)
DIFFERENTIAL OUTPUT AMPLITUDE vs. TEMPERATURE
MAX3825 toc04
DC TRANSFER FUNCTION
DIFFERENTIAL OUTPUT VOLTAGE (mVp-p)
MAX3825 toc05
410 DIFFERENTIAL OUTPUT AMPLITUDE (mpVp-p) 390 370 350 330 310 290 270 250
INPUT = 2mAp-p VCC = +3.6V
200
100
VCC = +3.14V
0
-100
-200 -15 10 35 60 85 -100 -50 0 50 100 AMBIENT TEMPERATURE (C) INPUT CURRENT (A)
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+3.3V, 2.5Gbps Quad Transimpedance Amplifier for System Interconnects MAX3825
Typical Operating Characteristics (continued)
(VCC = +3.3V, TA = +25C, unless otherwise noted.)
ELECTRICAL EYE DIAGRAM INPUT = 2mAp-p, 2.5Gbps, 213 - 1 PRBS
MAX3825 toc06
ELECTRICAL EYE DIAGRAM INPUT = 20Ap-p, 2.5Gbps, 213 - 1 PRBS
MAX3825 toc07
10mV/div
10mV/div
RL = 100 DIFFERENTIAL 50ps/div
RL = 100 DIFFERENTIAL 50ps/div
Pad Description
PAD 1, 2, 12, 13 3 4, 6, 8, 10 5, 7, 9, 11 14, 17, 40, 43 15, 16, 41, 42 18 20, 19, 38, 37 21, 24 22, 26, 30, 34 23, 27, 31, 35 25, 28 29, 32 33, 36 39 44 NAME N.C. FILTER IN1 to IN4 FILT1 to FILT4 GNDI4 to GNDI1 VCCI4 to VCCI1 ENABLE GNDO4 to GNDO1 VCCO4 OUT4- to OUT1OUT4+ to OUT1+ VCCO3 VCCO2 VCCO1 GNDF VCCFILT FUNCTION No Connection. Leave open and unconnected. Connection to internal 180 Filter Resistor to VCCFILT for Photodiode Array Cathode Bias Signal Inputs. Channel 1 to channel 4 signal inputs. Filter Connections. Channel 1 to channel 4 connection to internal filter resistors (720 to VCCFILT). Input Stage Ground Connections. Channel 4 to channel 1 input stage ground. Input Stage Supply Connections. Channel 4 to channel 1 input stage positive supply. DC Feedback Disable. Disables DC feedback of all four channels when connected to the positive supply (VCC). Left unconnected for normal operation. Output Stage Ground Connections. Channel 4 to channel 1 output stage ground. Channel 4 Output Stage Positive Supply Inverting Outputs. Channel 4 to channel 1 negative outputs. Noninverting Outputs. Channel 4 to channel 1 positive outputs. Channel 3 Output Stage Positive Supply Channel 2 Output Stage Positive Supply Channel 1 Output Stage Positive Supply Ground Connection for the Filters. Filter grounds. Power Supply Connection for Filter Resistor
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+3.3V, 2.5Gbps Quad Transimpedance Amplifier for System Interconnects
Functional Diagram
VCC FILT 720 D2 VCCO_ D1 R1 50 RF = 1.3k VCCI_ VCCO_ IN_ Q1 C1 GNDI_ R5 VCCI_ Q3 PARAPHASE AMP R2 50 OUT_Q2 FILT_
MAX3825
OUT_+
Q5
REFERENCE AMP R4
R3
GNDI_ DC CANCELLATION AMP
Q4 GNDI_
MAX3825
ENABLE
GNDO_
Figure 1. Functional Diagram for One Channel of the MAX3825
Detailed Description
The MAX3825 quad TIA circuit is designed for 2.5Gbps SONET/SDH applications. It comprises a transimpedance amplifier, a paraphase amplifier with CML outputs, and a DC cancellation loop to reduce pulse-width distortion (Figure 1).
DC Cancellation Loop
The DC cancellation loop removes the DC component of the input signal by using low-frequency feedback. This feature centers the signal within the MAX3825's dynamic range, reducing pulse-width distortion. The output of the paraphrase amplifier is sensed through resistors R3 and R4 and then filtered, amplified, and fed back to the base of transistor Q4. The transistor draws the DC component of the input signal away from the transimpedance amplifier's summing node. The MAX3825 DC cancellation loop is internally compensated and does not require external capacitors in most 2.5Gbps applications. The DC cancellation loop for all channels can be disabled by connecting ENABLE to the positive supply (VCC). ENABLE is inter5
Transimpedance Amplifier
The signal current at IN_ flows into the summing node of a high-gain amplifier. Shunt feedback through RF converts this current to a voltage with a gain of 1300. Diodes D1 and D2 clamp the output voltage for large input currents. GNDI_ is a direct connection to the emitter of the input transistor and must be connected directly to the photodetector AC ground return for best performance.
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+3.3V, 2.5Gbps Quad Transimpedance Amplifier for System Interconnects MAX3825
nally pulled low, so it does not need to be bonded out for the DC cancellation loop to function. The MAX3825 minimizes pulse-width distortion for data sequences exhibiting a 50% duty cycle and mark density. An input signal with a duty cycle and mark density significantly different from 50% will cause the MAX3825 to operate improperly. DC cancellation current drawn from the input creates noise. This is not a problem for a low-level signal with little or no DC component. Preamplifier noise increases for a signal with significant DC component (see Typical Operating Characteristics).
Table 1. Optical Power Relations
PARAMETER Average Power Extinction Ratio Optical Power of a "1" Optical Power of a "0" Signal Amplitude SYMBOL PAVG re P1 P0 PIN RELATION PAVG = (P0 + P1)/2 re = P1/P0 P1 = 2PAVG(re)/(re + 1) P0 = 2PAVG/(re + 1) PIN = P1 - P0 = 2PAVG (re - 1)/(re + 1)
Note: Assuming a 50% input duty cycle and mark density
Paraphase Amplifier and Output Stage
The paraphase amplifier converts single-ended inputs to differential outputs, and introduces a voltage gain of 2.8. This signal drives an internally biased emitter coupled pair, Q2 and Q3, which forms the output stage (Figure 1). Resistors R1 and R2 provide back-termination at the outputs, absorbing reflections between the MAX3825 and its load. The differential outputs are designed to drive a 100 load between OUT_+ and OUT_-. The MAX3825 can also drive higher output impedances, resulting in increased gain and output voltage swing.
POWER PI
PAVG
PIN
PO
Applications Information
The MAX3825 is a quad TIA that is ideal for 2.5Gbps SONET/SDH receivers. Its features allow easy design into a fiberoptic module.
Figure 2. Optical Power Definitions
TIME
Optical Power Relations
Many of the MAX3825 specifications relate to the input signal amplitude. When working with fiberoptic receivers, the input is usually expressed in terms of average optical power and extinction ratio. Table 1 shows relations that are helpful for converting optical power to an input signal when designing with the MAX3825 (Figure 2). The definitions are true if the mark density and duty cycle of the input data are 50%.
where is the photodiode responsivity in A/W and IN is in A.
Input Optical Overload
The overload is the largest input that the MAX3825 accepts while meeting specifications. The optical overload can be estimated in terms of average power with the following equation: I Overload = 10log10 MAX dBm 2 where is the photodiode responsivity in A/W and IMAX is in mA.
Optical Sensitivity Calculation
The input-referred RMS noise current (I N ) of the MAX3825 generally determines the receiver sensitivity. To obtain a system bit error rate (BER) of 1 x 10-14, the signal-to-noise ratio must always exceed 15.3. The input sensitivity, expressed in average power, can be estimated as: 15.3IN (re + 1) Sensitivity = 10log10 2(re - 1) x 1000
Optical Linear Range
The MAX3825's outputs limit when the input signal exceeds 50Ap-p. The MAX3825 operates in a linear range for inputs not exceeding:
6
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+3.3V, 2.5Gbps Quad Transimpedance Amplifier for System Interconnects MAX3825
50A(re + 1) Linear Range = 10log10 dBm 2(re - 1) x 1000 where is the photodiode responsivity in A/W.
VCCI_
500
Ground
Connect all input ground connections as close as possible to the AC ground of the photodetector diode. The photodetector AC ground is usually the ground of the filter capacitor from the photodetector cathode. The total loop (from GNDI_, through the bypass capacitor and the diode, and back to IN_) should be as short as possible.
VCCI_
1.3k IN_ 0.1pF 200
Photodiode Filter
Supply voltage noise at the cathode of the photodiode produces a current I = CPD V/t, which reduces the receiver sensitivity (C PD is the photodiode capacitance). The filter resistor of the MAX3825, combined with an external capacitor, can be used to reduce this noise (see the Typical Application Circuit). Current generated by the supply noise voltage is divided between CFILTER and CPD. The input noise current due to supply noise is (assuming the filter capacitor is much larger than the photodiode capacitance): INOISE = (VNOISE )(CPD ) (RFILTER )(CFILTER )
GNDI_
Figure 3. Equivalent Input Circuit
VCCO_
50
50
OUT+
Another important parameter is the inductance at the photodiode array's common cathode. It is important to keep this inductance to a minimum to reduce the coupling between the photodiodes. To keep this inductance small, keep all bond wires as short as possible.
OUT-
Wire Bonding
For high current density and reliable operation, the MAX3825 uses gold metalization. Connections to the die should be made with gold wire only, using ball bonding techniques. Wedge bonding is not recommended. Die thickness is typically 14 mils (mm).
Interface Models
Refer to Figures 3 and 4 for the equivalent input and output circuits of the MAX3825.
Chip Information
TRANSISTOR COUNT: 1469 PROCESS: BIPOLAR (SILICON GERMANIUM) DIE SIZE: 65 99mils/(1651 2515 microns)
GNDO_
Figure 4. Equivalent Output Circuit
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+3.3V, 2.5Gbps Quad Transimpedance Amplifier for System Interconnects MAX3825
Typical Application Circuit
VCC
PIN ARRAY
FILTER FILT1
RFILTER = 180
VCC
RFILT1 = 720 OUT1+ IN1+ IN1OUT1OUT1+
IN1 OUT1FILT2 RFILT2 = 720 OUT2+ IN2 OUT2FILT3 RFILT3 = 720 OUT3+ IN3 OUT3FILT4 RFILT4 = 720 OUT4+ IN4 OUT4-
50 50
50 50
IN2+ IN2-
OUT2+
OUT2-
50 50
IN3+ IN3-
OUT3+
OUT3-
50 50
IN4+ IN4-
OUT4+
OUT4-
CFILTER
MAX3825 QUAD TIA
MAX3822 QUAD LIMITING AMP
LOP
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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